Interpretation of XILINX's 7 Series 28nm FPGA Packaging Strategy

You must be familiar with the story of buying a beggar. If you compare the most valuable and most technical silicon in the chip to a pearl, the package on the outside of the chip, including the pins, can be compared.

If you are engaged in chips, you are proud to be able to design the jewel in the crown. If someone says that they are engaged in packaging, most people will feel that it is the non-mainstream of the chip industry.

However, there is a man named Gordon Moore who came up with a Moore's Law and made it clear that the same pearl, the price, is halved every 18 months. (This article was originally created by OpenHW.org's Kevin, please indicate it). The source of the chip, in the final analysis, is inexhaustible sand, and the package, the pin, but the actual consumption of copper, gold, rare metals and other resources. Therefore, the cost of packaging is reduced by much less than the speed of Moore's Law. In this way, if the price of 椟 is the same, the price of pearl will one day be cheaper than 椟, no way, and the price of expensive, by 2 except n times, will be very cheap.
Packaging is also expensive and cheap. The more expensive the pins, the more expensive the requirements for heat dissipation. Therefore, it is also cheap to make the package, and the power consumption is a basic requirement.

In 1998, when XILINX began to develop the low-priced series of chips Spartan, it was a multi-tube low-cost, based on the Virtex series of chips, by reducing the complexity of the silicon, controlling the capacity, the number of pins, power consumption, package form, etc. , get low cost. In 1998, the cost of silicon was a dominant share of the cost of the entire chip. Therefore, XILINX made great efforts to design a new simplified silicon internal structure, reduce the complexity of the silicon, and reduce the size of the die. It can greatly reduce the cost of the entire chip, and has made a legend of the low-end FPGA series Spartan for more than 10 years.

By 2010, when the XILINX 7 series was released, the process node had reached 28nm. At this time, the cost of the die for a smaller, smaller-capacity FPGA was comparable to or lower than the cost of the package. At this time, it took so much effort to work hard on the chip design to reduce the cost. In the end, the cost on the die saved a few cents, which is obviously uneconomical. It is better to use the same structure and work harder to reduce power consumption. And then use a lower cost package to get the overall low cost of the chip.

In this line of thought, XILINX's 7 series, unified architecture FPGA was born. Although the name has changed to three, ArTIx-7, Kintex-7, Virtex-7, but the internal structure, clock, speed, and so on are based on a framework, which is based on the ASMBL technology architecture of the Virtex series. The only difference is the combination of internal functions to serve different markets.

Due to the application of the HKMG process, the power consumption is greatly reduced. As a result, the ArTIx-7 series, which is the cheapest device in the 7 series, can take advantage of low power consumption and boldly adopt a smaller package at a lower cost. Both 椟 and 珠 are much cheaper, thus achieving ultra-low prices and impacting the broader ASIC and ASIP markets.

The Kintex-7, because it does not contain the most expensive transceivers, has achieved high performance and low price in the current mainstream 10G serial transceiver applications.

Of course, the Virtex-7 continues the noble lineage of the traditional Virtex series, continuing to dominate the high-end market with the industry's highest speed and highest density.

Although Moore's Law continues as usual, quantitative changes cause qualitative changes, and many of the industry's mindsets need to change. When Moore's Law finally came to an end, perhaps the most active area in the industry was the packaging industry. In fact, at present, a large number of stacked package technologies are used in mobile phones, which is one of the signs of this trend.

Just as XILINX invented the FPGA and invented the Fabless business model, the unified architecture of XILINX once again did the right thing at the right historical turning point.

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